
A multilayer embedded chip PCB that places the chip inside a single-side embedded HDI structure for miniaturization, thinner construction, higher integration, stronger electrical performance, improved reliability, cost efficiency, and design flexibility. The capability covers 2-10 layers, 3/3 mil inner routing, 3.5/3.5 mil outer routing, 0.10 mm laser vias, 0.15 mm mechanical drilling, 4 mil annular rings, 16:1 through-hole aspect ratio, and ENIG, ENEPIG, HASL, Flash Gold, Hard Gold, or OSP finishes.
Specs
| Structure | Multilayer embedded chip, single-side embedding, HDI structure |
| Layers | 2-10 |
| Line / Space | 3/3 mil inner, 3.5/3.5 mil outer |
| Min Hole Size | 0.10 mm laser / 0.15 mm mechanical |
| Min Annular Ring | 4 mil |
| Hole-to-Conductor Spacing | 5 mil up to 6L, 6 mil for 7-11L, 8 mil for 12L+ |
| Aspect Ratio | 1:1 blind vias; 16:1 through holes |
| Dimensional Tolerance | +/-0.10 mm, special +/-0.05 mm |
| Surface Finish | ENIG, ENEPIG, HASL, Flash Gold, Hard Gold, OSP |
Applications