
A 10-layer back-drilled PCB on IT-170GRA2 high-Tg laminate, 1.27±0.1mm thick, with ENIG plus gold-finger plating, minimum drilled hole φ0.20mm, and through-hole copper of 18μm minimum / 20μm average. Back drilling removes the unused stub of plated-through vias on high-speed lanes, which suppresses stub resonance and lowers insertion-loss penalties at multi-Gbps signal rates. The process is held to a 0.15mm stub-to-inner-line clearance, tight enough to keep stubs short on dense backplane stackups without breaking into adjacent signal traces. The gold-finger edge and ENIG combination supports repeated card insertions in slot-based architectures, and the high-Tg substrate keeps the board dimensionally stable across the soldering and operating thermal cycles common in data-center cabinets. Typical fits are server backplanes and switch fabric cards, telecom line cards, AI accelerator interconnect boards, optical-module mother-cards, and high-speed test and measurement boards.
Specs
| Layers | 10 |
| Material | IT-170GRA2 |
| Board Thickness | 1.27±0.1mm |
| Surface Finish | ENIG + gold finger |
| Min Hole Size | φ0.20mm |
| Copper Weight | Min hole copper 18μm, avg hole copper 20μm |
| Characteristic | Back-drill stub to inner-line clearance 0.15mm |
Applications